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Intel demos 48-core cloud-datacenter-on-a-chip

2009-12-04 09:49 by
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Intel has taken its Terascale computing project to the next level, with a 48-core x86 processor that will serve as a test-bed for many-core technologies.

Intel held a press event in downtown San Francisco on Wednesday. It was another Terascale event—Terascale being the company's test-bed for many-core technologies, and not an actual product. But the 48-core, Single-chip Cloud Computer (SCC) that Intel demonstrated is a lot closer to being a viable product than the 80-core "Polaris" chip that the chipmaker first unveiled in 2007.

The 45nm SCC has much in common with Polaris, which I described in detail in the article linked above. Like Polaris, the cores are arranged into 27 "tiles," but each SCC tile contains two cores, two L2 caches (one per core), and one router that connects the tile to rest of the SCC's packet-switched mesh network. Also like Polaris, there is some amount of granularity for doing software-controlled dynamic power management by altering the voltage and frequency of the cores. With SCC, each two-core tile can have its own frequency, and the voltage of tiles can be scaled in groups of four tiles. Taken together, these options let Intel scale the power consumption of the chip from 25W up to 125W.

The individual cores that make up SCC are considerably more substantial than those that made up Polaris. The Polaris cores contained some floating-point hardware suitable only for DSP-type applications. The SCC cores, in contrast, are full-blown x86 implementations, albeit incredibly simple ones.

Read more -here-

 

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